| 1 | -- | 2 | Toomas P. Plaks. Guest Editorial Special Section on Configurable Computing Design- I: High-Level Reconfiguration |
| 3 | -- | 13 | Gerard K. Rauwerda, Paul M. Heysters, Gerard J. M. Smit. Towards Software Defined Radios Using Coarse-Grained Reconfigurable Hardware |
| 14 | -- | 23 | Mitchell J. Myjak, José G. Delgado-Frias. A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance |
| 24 | -- | 33 | Vincent Nollet, Prabhat Avasare, Hendrik Eeckhaut, Diederik Verkest, Henk Corporaal. Run-Time Management of a MPSoC Containing FPGA Fabric Tiles |
| 34 | -- | 44 | David L. Andrews, Ron Sass, Erik Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp. Achieving Programming Model Abstractions for Reconfigurable Computing |
| 45 | -- | 56 | Jingzhao Ou, Viktor K. Prasanna. A Cooperative Management Scheme for Power Efficient Implementations of Real-Time Operating Systems on Soft Processors |
| 57 | -- | 65 | Sherif Yusuf, Wayne Luk, Morris Sloman, Naranker Dulay, Emil C. Lupu, Geoffrey Brown. Reconfigurable Architecture for Network Flow Analysis |
| 66 | -- | 74 | Justin L. Tripp, Maya Gokhale, Anders A. Hansson. A Case Study of Hardware/Software Partitioning of Traffic Simulation on the Cray XD1 |
| 75 | -- | 85 | Sami Khawam, Ioannis Nousias, Mark Milward, Ying Yi, Mark Muir, Tughrul Arslan. The Reconfigurable Instruction Cell Array |
| 86 | -- | 97 | Kanak Agarwal, Sani R. Nassif. The Impact of Random Device Variation on SRAM Cell Stability in Sub-90-nm CMOS Technologies |
| 98 | -- | 107 | Irith Pomeranz, Sudhakar M. Reddy. Transition Path Delay Faults: A New Path Delay Fault Model for Small and Large Delay Defects |
| 108 | -- | 112 | C. Y. Chang, H. M. Chen. Design Migration From Peripheral ASIC Design to Area-I/O Flip-Chip Design by Chip I/O Planning and Legalization |