| 1733 | -- | 1745 | Manas Ranjan Meher, Ching-Chuen Jong, Chip-Hong Chang. A High Bit Rate Serial-Serial Multiplier With On-the-Fly Accumulation by Asynchronous Counters |
| 1746 | -- | 1754 | Luca Henzen, Jean-Philippe Aumasson, Willi Meier, Raphael Chung-Wei Phan. VLSI Characterization of the Cryptographic Hash Function BLAKE |
| 1755 | -- | 1764 | Irith Pomeranz, Sudhakar M. Reddy. Reducing the Storage Requirements of a Test Sequence by Using One or Two Background Vectors |
| 1765 | -- | 1774 | Xuan-Lun Huang, Jiun-Lang Huang. ADC/DAC Loopback Linearity Testing by DAC Output Offsetting and Scaling |
| 1775 | -- | 1786 | Mehdi Baradaran Tahoori. High Resolution Application Specific Fault Diagnosis of FPGAs |
| 1787 | -- | 1800 | Ying Zhang, Huawei Li, Yinghua Min, Xiaowei Li. Selected Transition Time Adjustment for Tolerating Crosstalk Effects on Network-on-Chip Interconnects |
| 1801 | -- | 1812 | Yu Wang, Jiang Xu, Yan Xu, Weichen Liu, Huazhong Yang. Power Gating Aware Task Scheduling in MPSoC |
| 1813 | -- | 1822 | Cathy Qun Xu, Chun Jason Xue, Edwin Hsing-Mean Sha. Energy-Efficient Joint Scheduling and Application-Specific Interconnection Design |
| 1823 | -- | 1836 | Zhuo Feng, Zhiyu Zeng, Peng Li. Parallel On-Chip Power Distribution Network Analysis on Multi-Core-Multi-GPU Platforms |
| 1837 | -- | 1847 | Vinayak Honkote, Baris Taskin. CROA: Design and Analysis of the Custom Rotary Oscillatory Array |
| 1848 | -- | 1860 | Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry. A Novel Low Area Overhead Direct Adaptive Body Bias (D-ABB) Circuit for Die-to-Die and Within-Die Variations Compensation |
| 1861 | -- | 1873 | Gautam Hazari, H. Narayanan. On the Use of Simple Electrical Circuit Techniques for Performance Modeling and Optimization in VLSI Systems |
| 1874 | -- | 1883 | Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgorzata Marek-Sadowska. Performance Optimization Using Variable-Latency Design Style |
| 1884 | -- | 1897 | Thidapat Chantem, Xiaobo Sharon Hu, Robert P. Dick. Temperature-Aware Scheduling and Assignment for Hard Real-Time Applications on MPSoCs |
| 1898 | -- | 1902 | Martin Grymel, Steve Furber. A Novel Programmable Parallel CRC Circuit |
| 1902 | -- | 1907 | Kiichi Niitsu, Yasufumi Sugimori, Yoshinori Kohama, Kenichi Osada, Naohiko Irie, Hiroki Ishikuro, Tadahiro Kuroda. Analysis and Techniques for Mitigating Interference From Power/Signal Lines and to SRAM Circuits in CMOS Inductive-Coupling Link for Low-Power 3-D System Integration |
| 1907 | -- | 1911 | Irith Pomeranz, Sudhakar M. Reddy. Test Strength: A Quality Metric for Transition Fault Tests in Full-Scan Circuits |
| 1911 | -- | 1916 | Behzad Ebrahimi, Masoud Rostami, Ali Afzali-Kusha, Massoud Pedram. Statistical Design Optimization of FinFET SRAM Using Back-Gate Voltage |
| 1916 | -- | 1921 | Amin Khajeh, Ahmed M. Eltawil, Fadi J. Kurdahi. Embedded Memories Fault-Tolerant Pre- and Post-Silicon Optimization |
| 1921 | -- | 1926 | Lok-Won Kim, John D. Villasenor. A System-On-Chip Bus Architecture for Thwarting Integrated Circuit Trojan Horses |
| 1926 | -- | 1931 | Elham Safi, Andreas Moshovos, Andreas G. Veneris. Two-Stage, Pipelined Register Renaming |
| 1931 | -- | 1935 | Mostafa E. Salehi, Mehrzad Samadi, Mehrdad Najibi, Ali Afzali-Kusha, Massoud Pedram, Sied Mehdi Fakhraie. Dynamic Voltage and Frequency Scheduling for Embedded Processors Considering Power/Performance Tradeoffs |