| 1613 | -- | 1626 | Ye Zhang, Wenlong Lyu, Wai-Shing Luk, Fan Yang 0001, Hai Zhou, Dian Zhou, David Z. Pan, Xuan Zeng 0001. Cut Redistribution and Insertion for Advanced 1-D Layout Design via Network Flow Optimization |
| 1627 | -- | 1636 | Samuel N. Pagliarini, Mehmet Meric Isgenc, Mayler G. A. Martins, Lawrence T. Pileggi. Application and Product-Volume-Specific Customization of BEOL Metal Pitch |
| 1637 | -- | 1646 | Tsung-Han Tsai, Shih-Wei Chen. Single-Chip Design for Intelligent Surveillance System |
| 1647 | -- | 1658 | Mahmood J. Azhar, Fathi Amsaad, Selçuk Köse. Duty-Cycle-Based Controlled Physical Unclonable Function |
| 1659 | -- | 1670 | Hasan Erdem Yantir, Ahmed M. Eltawil, Fadi J. Kurdahi. A Two-Dimensional Associative Processor |
| 1671 | -- | 1684 | Jinyang Li 0002, Yongpan Liu, Hehe Li, Zhe Yuan, Chenchen Fu, Jinshan Yue, Xiaoyu Feng, Chun Jason Xue, Jingtong Hu, Huazhong Yang. PATH: Performance-Aware Task Scheduling for Energy-Harvesting Nonvolatile Processors |
| 1685 | -- | 1698 | Nguyen Van Toan, Dam Minh Tung, Jeong-Gun Lee. Analysis of Clock Scheduling in Frequency Domain for Digital Switching Noise Suppressions |
| 1699 | -- | 1712 | Neetu Jindal, Preeti Ranjan Panda, Smruti R. Sarangi. Reusing Trace Buffers as Victim Caches |
| 1713 | -- | 1726 | Rafael Trapani Possignolo, Elnaz Ebrahimi, Ehsan K. Ardestani, Alamelu Sankaranarayanan, José Luis Briz, Jose Renau. GPU NTC Process Variation Compensation With Voltage Stacking |
| 1727 | -- | 1736 | Jheng-Hao Ye, Ming-Der Shieh. Low-Complexity VLSI Design of Large Integer Multipliers for Fully Homomorphic Encryption |
| 1737 | -- | 1749 | Tahmid Abtahi, Colin Shea, Amey M. Kulkarni, Tinoosh Mohsenin. Accelerating Convolutional Neural Network With FFT on Embedded Hardware |
| 1750 | -- | 1762 | Subrahmanyam Mula, Vinay Chakravarthi Gogineni, Anindya Sundar Dhar. Algorithm and VLSI Architecture Design of Proportionate-Type LMS Adaptive Filters for Sparse System Identification |
| 1763 | -- | 1776 | Hong Zhang 0009, Junqiang Sun, Jie Zhang 0039, Ruizhi Zhang, Anthony Chan Carusone. A Low-Power Pipelined-SAR ADC Using Boosted Bucket-Brigade Device for Residue Charge Processing |
| 1777 | -- | 1787 | Kenichi Ohhata, Daiki Hayakawa, Kenji Sewaki, Kento Imayanagida, Kouki Ueno, Yuuki Sonoda, Kenichiro Muroya. A 900-MHz, 3.5-mW, 8-bit Pipelined Subranging ADC Combining Flash ADC and TDC |
| 1788 | -- | 1801 | Moataz Abdelfattah, Gordon W. Roberts. Cascade and LC Ladder-Based Filter Realizations Using Synchronous Time-Mode Signal Processing |
| 1802 | -- | 1806 | JuHyung Hong, Sangwoo Han, Young-Min Park, Eui-Young Chung. ICS: Interrupt-Based Channel Sneaking for Maximally Exploiting Die-Level Parallelism of NAND Flash-Based Storage Devices |
| 1807 | -- | 1811 | Cecilia Gimeno, David Bol, Denis Flandre. Multilevel Half-Rate Phase Detector for Clock and Data Recovery Circuits |
| 1812 | -- | 1816 | Meysam Akbari, Omid Hashemipour, Farshad Moradi. Input Offset Estimation of CMOS Integrated Circuits in Weak Inversion |