| 1813 | -- | 1823 | Nikos Temenos, Paul P. Sotiriadis. Stochastic Computing Max & Min Architectures Using Markov Chains: Design, Analysis, and Implementation |
| 1824 | -- | 1837 | Zhenxin Zhao, Lihong Zhang. Efficient Performance Modeling for Automated CMOS Analog Circuit Synthesis |
| 1838 | -- | 1849 | Po-Hsuan Wei, Boris Murmann. Analog and Mixed-Signal Layout Automation Using Digital Place-and-Route Tools |
| 1850 | -- | 1860 | Mohamed B. Elamien, Brent J. Maundy, Leonid Belostotski, Ahmed S. Elwakil. Analog Circuit Design Using Symbolic Math Toolboxes: Demonstrative Examples |
| 1861 | -- | 1874 | Ahmed S. Emara, Denis Romanov, Gordon W. Roberts, Sadok Aouini, Soheyl Ziabakhsh, Mahdi Parvizi, Naim Ben Hamida. An Area-Efficient High-Resolution Segmented ΣΔ-DAC for Built-In Self-Test Applications |
| 1875 | -- | 1888 | Shao-Chun Hung, Yi-Chen Lu, Sung Kyu Lim, Krishnendu Chakrabarty. Power Supply Noise-Aware At-Speed Delay Fault Testing of Monolithic 3-D ICs |
| 1889 | -- | 1902 | Jin-Tai Yan. Via-Avoidance-Oriented Interposer Routing for Layer Minimization in 2.5-D IC Designs |
| 1903 | -- | 1911 | Qianqian Wang, Fei Liu, Cece Huang, Qianhui Li, Zongliang Huo. A Small Ripple and High-Efficiency Wordline Voltage Generator for 3-D nand Flash Memories |
| 1912 | -- | 1921 | Madhan Thirumoorthi, Marko Jovanovic, Mitra Mirhassani, Mohammed A. S. Khalid. Design and Evaluation of a Hybrid Chaotic-Bistable Ring PUF |
| 1922 | -- | 1929 | Yingchun Lu, Xinyu Wang, Yanjie Wang, Yuan Zhang, Liang Yao, Maoxiang Yi, Zhengfeng Huang, Huaguo Liang. Pure Digital Scalable Mixed Entropy Separation Structure for Physical Unclonable Function and True Random Number Generator |
| 1930 | -- | 1942 | Abdullah Aljuffri, Marc Zwalua, Cezar Rodolfo Wedig Reinbrecht, Said Hamdioui, Mottaqiallah Taouil. Applying Thermal Side-Channel Attacks on Asymmetric Cryptography |
| 1943 | -- | 1954 | Milad Bahadori, Kimmo Järvinen 0001, Valtteri Niemi. FPGA Implementations of 256-Bit SNOW Stream Ciphers for Postquantum Mobile Security |
| 1955 | -- | 1966 | Dawen Xu 0002, Meng He 0012, Cheng Liu 0008, Ying Wang 0001, Long Cheng 0003, Huawei Li, Xiaowei Li 0001, Kwang-Ting Cheng. R2F: A Remote Retraining Framework for AIoT Processors With Computing Errors |
| 1967 | -- | 1980 | Libo Chang, Shengbing Zhang, Huimin Du, Yue Chen, Shiyu Wang. A Reconfigurable Neural Network Processor With Tile-Grained Multicore Pipeline for Object Detection on FPGA |
| 1981 | -- | 1993 | Hongtao Zhong, Shengjie Cao, Li Jiang 0002, Xia An, Vijaykrishnan Narayanan, Yongpan Liu, Huazhong Yang, Xueqing Li. DyTAN: Dynamic Ternary Content Addressable Memory Using Nanoelectromechanical Relays |
| 1994 | -- | 1997 | Neelam Arya, Manisha Pattanaik, G. K. Sharma 0001. Energy-Efficient Logarithmic Square Rooter for Error-Resilient Applications |
| 1998 | -- | 2002 | Heiner Bauer, Sebastian Höppner, Chris Paul Iatrou, Zohra Charania, Stephan Hartmann 0002, Saif-Ur Rehman, Andreas Dixius, Georg Ellguth, Dennis Walter, Johannes Uhlig, Felix Neumärker, Marc Berthel, Marco Stolba, Florian Kelber, Leon Urbas, Christian Mayr. Hardware Implementation of an OPC UA Server for Industrial Field Devices |
| 2003 | -- | 2007 | Chenggang Yan, Jie Sun, Weiqiang Liu. An Efficient High SFDR PDDS Using High-Pass-Shaped Phase Dithering |
| 2008 | -- | 2012 | Yongwoon Song, Jooyoung Hwang, Insoon Jo, Hyukjun Lee. Highly Available Packet Buffer Design With Hybrid Nonvolatile Memory |