| 247 | -- | 258 | Seyfeddine Boukhtache, Benoît Blaysat, Michel Grédiac, François Berry. Alternatives to Bicubic Interpolation Considering FPGA Hardware Resource Consumption |
| 259 | -- | 272 | Jun Li, Paul Chow, Yuanxi Peng, Tian Jiang. FPGA Implementation of an Improved OMP for Compressive Sensing Reconstruction |
| 273 | -- | 286 | Karim Hammad, Zhongpan Wu, Ebrahim Ghafar-Zadeh, Sebastian Magierowski. A Scalable Hardware Accelerator for Mobile DNA Sequencing |
| 287 | -- | 296 | Chenbing Qu, Zhangming Zhu, Yunfei En, Liwei Wang 0003, Xiaoxian Liu. Area-Efficient Extended 3-D Inductor Based on TSV Technology for RF Applications |
| 297 | -- | 306 | Atul Thakur, Shouri Chatterjee. A 4.4-mA ESD-Safe 900-MHz LNA With 0.9-dB Noise Figure |
| 307 | -- | 320 | Zhuojun Liang, Dongxu Lv, Chao Cui, Hai-Bao Chen, Weifeng He, Weiguang Sheng, Naifeng Jing, Zhigang Mao, Guanghui He. A 3.85-Gb/s 8 × 8 Soft-Output MIMO Detector With Lattice-Reduction-Aided Channel Preprocessing |
| 321 | -- | 332 | Tsutomu Yoshimura. Study of Injection Pulling of Oscillators in Phase-Locked Loops |
| 333 | -- | 346 | Jian Zhou 0012, Sumit K. Mandal, Brendan L. West, Siyuan Wei, Ümit Y. Ogras, Oliver D. Kripfgans, J. Brian Fowlkes, Thomas F. Wenisch, Chaitali Chakrabarti. Front-End Architecture Design for Low-Complexity 3-D Ultrasound Imaging Based on Synthetic Aperture Sequential Beamforming |
| 347 | -- | 358 | Kai Wang, Fengkai Yuan, Lutan Zhao, Rui Hou, Zhenzhou Ji, Dan Meng. Mitigating Cross-Core Cache Attacks via Suspicious Traffic Detection |
| 359 | -- | 371 | Jing Tian 0004, Jun Lin, Zhongfeng Wang. Fast Modular Multipliers for Supersingular Isogeny-Based Post-Quantum Cryptography |
| 372 | -- | 385 | Riduan Khaddam-Aljameh, Pier Andrea Francese, Luca Benini, Evangelos Eleftheriou. An SRAM-Based Multibit In-Memory Matrix-Vector Multiplier With a Precision That Scales Linearly in Area, Time, and Power |
| 386 | -- | 396 | Gauthaman Murali, Xiaoyu Sun, Shimeng Yu, Sung Kyu Lim. Heterogeneous Mixed-Signal Monolithic 3-D In-Memory Computing Using Resistive RAM |
| 397 | -- | 408 | Daehan Ji, Dongyeob Shin, Jongsun Park 0001. An Error Compensation Technique for Low-Voltage DNN Accelerators |
| 409 | -- | 422 | Sanmitra Banerjee, Arjun Chaudhuri, August Ning, Krishnendu Chakrabarty. Variation-Aware Delay Fault Testing for Carbon-Nanotube FET Circuits |
| 423 | -- | 433 | Irith Pomeranz, Xijiang Lin. Single Test Type to Replace Broadside and Skewed-Load Tests for Transition Faults |
| 434 | -- | 446 | Roohollah Yarmand, Mehdi Kamal, Ali Afzali-Kusha, Pooria Esmaeli, Massoud Pedram. OPTIMA: An Approach for Online Management of Cache Approximation Levels in Approximate Processing Systems |