Kazutami Arimoto, Fukashi Morishita, Isamu Hayashi, Katsumi Dosaka, Hiroki Shimano, Takashi Ipposhi. A High-Density Scalable Twin Transistor RAM (TTRAM) With Verify Control for SOI Platform Memory IPs. J. Solid-State Circuits, 42(11):2611-2619, 2007. [doi]
@article{ArimotoMHDSI07,
title = {A High-Density Scalable Twin Transistor RAM (TTRAM) With Verify Control for SOI Platform Memory IPs},
author = {Kazutami Arimoto and Fukashi Morishita and Isamu Hayashi and Katsumi Dosaka and Hiroki Shimano and Takashi Ipposhi},
year = {2007},
doi = {10.1109/JSSC.2007.907185},
url = {https://doi.org/10.1109/JSSC.2007.907185},
researchr = {https://researchr.org/publication/ArimotoMHDSI07},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {42},
number = {11},
pages = {2611-2619},
}