Kazutami Arimoto, Fukashi Morishita, Isamu Hayashi, Katsumi Dosaka, Hiroki Shimano, Takashi Ipposhi. A High-Density Scalable Twin Transistor RAM (TTRAM) With Verify Control for SOI Platform Memory IPs. J. Solid-State Circuits, 42(11):2611-2619, 2007. [doi]
Abstract is missing.