The following publications are possibly variants of this publication:
- A capacitorless twin-transistor random access memory (TTRAM) on SOIFukashi Morishita, Hideyuki Noda, Takayuki Gyohten, Mako Okamoto, Takashi Ipposhi, Shigeto Maegawa, Katsumi Dosaka, Kazutami Arimoto. cicc 2005: 435-438 [doi]
- A Capacitorless Twin-Transistor Random Access Memory (TTRAM) on SOIFukashi Morishita, Hideyuki Noda, Isamu Hayashi, Takayuki Gyohten, Mako Okamoto, Takashi Ipposhi, Shigeto Maegawa, Katsumi Dosaka, Kazutami Arimoto. ieicet, 90-C(4):765-771, 2007. [doi]
- A Scalable ET2RAM (SETRAM) with Verify Control for SoC Platform Memory IP on SOIKazutami Arimoto, Fukashi Morishita, Isamu Hayashi, Tetsushi Tanizaki, Takashi Ipposhi, Katsumi Dosaka. cicc 2006: 429-432 [doi]