Design Space Pruning Through Early Estimations of Area/Delay Tradeoffs for FPGA Implementations - researchr publication

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Sebastien Bilavarn, Guy Gogniat, Jean Luc Philippe, Lilian Bossuet. Design Space Pruning Through Early Estimations of Area/Delay Tradeoffs for FPGA Implementations. IEEE Trans. on CAD of Integrated Circuits and Systems, 25(10):1950-1968, 2006. [doi]

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