The following publications are possibly variants of this publication:
- A memory mapping approach for network and controller optimization in parallel interleaver architecturesAroua Briki, Cyrille Chavet, Philippe Coussy. glvlsi 2013: 321-322 [doi]
- A memory mapping approach based on network customization to design conflict-free parallel hardware architecturesSaeed Ur Reehman, Cyrille Chavet, Philippe Coussy. glvlsi 2014: 193-198 [doi]
- In-place memory mapping approach for optimized parallel hardware interleaver architecturesSaeed Ur Reehman, Cyrille Chavet, Philippe Coussy, Awais Sani. date 2015: 896-899 [doi]
- A memory mapping approach for parallel interleaver design with multiples read and write accessesCyrille Chavet, Philippe Coussy. iscas 2010: 3168-3171 [doi]
- A design approach dedicated to network-based and conflict-free parallel interleaversAroua Briki, Cyrille Chavet, Philippe Coussy, Eric Martin 0001. glvlsi 2012: 153-158 [doi]