Testing and design-for-testability solutions for 3D integrated circuits - researchr publication related

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Krishnendu Chakrabarty. Testing and design-for-testability solutions for 3D integrated circuits. In Rolf Kraemer, Adam Pawlak, Andreas Steininger, Mario Schölzel, Jaan Raik, Heinrich Theodor Vierhaus, editors, 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2011, Cottbus, Germany, April 13-15, 2011. pages 5, IEEE, 2011. [doi]

The following publications are possibly variants of this publication:

Test Challenges for 3D Integrated CircuitsHsien-Hsin S. Lee, Krishnendu Chakrabarty. dt, 26(5):26-35, 2009. [doi]

Test and Design-for-Testability Solutions for 3D Integrated CircuitsKrishnendu Chakrabarty, Mukesh Agrawal 0001, Sergej Deutsch, Brandon Noia, Ran Wang 0002, Fangming Ye. imt, 9(4):386-403, 2014. [doi]

Test and Design-for-Testability Solutions for 3D Integrated CircuitsKrishnendu Chakrabarty, Mukesh Agrawal, Sergej Deutsch, Brandon Noia, Ran Wang, Fangming Ye. ipsj, 7:56-73, 2014. [doi]

A Design-for-Test Solution for Monolithic 3D Integrated CircuitsAbhishek Koneru, Sukeshwar Kannan, Krishnendu Chakrabarty. iccd 2017: 685-688 [doi]

A design-for-test solution for monolithic 3D integrated circuitsRan Wang, Krishnendu Chakrabarty. ets 2016: 1-6 [doi]

Test and Design-for-Testability Solutions for Monolithic 3D Integrated CircuitsAbhishek Koneru, Krishnendu Chakrabarty. glvlsi 2019: 457-462 [doi]

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