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Víctor H. Champac, Antonio Zenteno, José L. Garcia. Testing of resistive opens in CMOS latches and flip-flops. In 10th European Test Symposium (ETS 2005), May 22-25, 2005, Tallinn, Estonia. pages 34-40, IEEE, 2005. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Design-for-Test Techniques for Opens in Undetected Branches in CMOS Latches and Flip-FlopsAntonio Zenteno Ramirez, Guillermo Espinosa, Víctor H. Champac. tvlsi, 15(5):572-577, 2007. [doi] Resistive Opens in a Class of CMOS Latches: Analysis and DFTAntonio Zenteno, Víctor H. Champac. vts 2001: 138-144 [doi]
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