BIST TPG for Combinational Cluster Interconnect Testing at Board Level

Chen-Huan Chiang, Sandeep K. Gupta. BIST TPG for Combinational Cluster Interconnect Testing at Board Level. J. Electronic Testing, 16(5):427-442, 2000. [doi]

Authors

Chen-Huan Chiang

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Sandeep K. Gupta

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