Chen-Huan Chiang, Sandeep K. Gupta. BIST TPG for Combinational Cluster (Glue Logic) Interconnect Testing at Board Level. In 7th Asian Test Symposium (ATS 98), 2-4 December 1998, Singapore. pages 244-252, IEEE Computer Society, 1998. [doi]
@inproceedings{ChiangG98:0,
title = {BIST TPG for Combinational Cluster (Glue Logic) Interconnect Testing at Board Level},
author = {Chen-Huan Chiang and Sandeep K. Gupta},
year = {1998},
url = {http://csdl.computer.org/comp/proceedings/ats/1998/8277/00/82770244abs.htm},
tags = {testing, logic},
researchr = {https://researchr.org/publication/ChiangG98%3A0},
cites = {0},
citedby = {0},
pages = {244-252},
booktitle = {7th Asian Test Symposium (ATS 98), 2-4 December 1998, Singapore},
publisher = {IEEE Computer Society},
isbn = {0-8186-8277-9},
}