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Valentina Ciriani, Anna Bernasconi, Rolf Drechsler. Testability of SPP Three-Level Logic Networks in Static Fault Models. IEEE Trans. on CAD of Integrated Circuits and Systems, 25(10):2241-2248, 2006. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Testability of SPP Three-Level Logic NetworksValentina Ciriani, Anna Bernasconi, Rolf Drechsler. vlsi 2003: 331-336 Synthesis of SPP three-level logic networks using affine spacesValentina Ciriani. tcad, 22(10):1310-1323, 2003. [doi] Stuck-At-Fault Testability of SPP Three-Level Logic FormsValentina Ciriani, Anna Bernasconi, Rolf Drechsler. vlsi 2006: 299-313 [doi]
The following publications are possibly variants of this publication: