Post-layout timing simulation of CMOS circuits

Denis Deschacht, Michel Robert, Nadine Azémard-Crestani, Daniel Auvergne. Post-layout timing simulation of CMOS circuits. IEEE Trans. on CAD of Integrated Circuits and Systems, 12(8):1170-1177, 1993. [doi]

Authors

Denis Deschacht

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Michel Robert

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Nadine Azémard-Crestani

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Daniel Auvergne

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