The following publications are possibly variants of this publication:
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- Fast reliability analysis of combinatorial logic circuits using conditional probabilitiesJ. Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche. mr, 50(9-11):1215-1218, 2010. [doi]
- Reliability analysis of logic circuits based on signal probabilityDenis Teixeira Franco, Maí Correia Vasconcelos, Lirida A. B. Naviner, Jean-François Naviner. icecsys 2008: 670-673 [doi]
- An approach to reduce computational cost in combinatorial logic netlist reliability analysis using circuit clustering and conditional probabilitiesJosep Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche. iolts 2011: 98-103 [doi]