Variation-aware subthreshold logic circuit design

Hiroshi Fuketa, Ryo Takahashi, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai. Variation-aware subthreshold logic circuit design. In IEEE 10th International Conference on ASIC, ASICON 2013, Shenzhen, China, October 28-31, 2013. pages 1-4, IEEE, 2013. [doi]

Authors

Hiroshi Fuketa

This author has not been identified. Look up 'Hiroshi Fuketa' in Google

Ryo Takahashi

This author has not been identified. Look up 'Ryo Takahashi' in Google

Makoto Takamiya

This author has not been identified. Look up 'Makoto Takamiya' in Google

Masahiro Nomura

This author has not been identified. Look up 'Masahiro Nomura' in Google

Hirofumi Shinohara

This author has not been identified. Look up 'Hirofumi Shinohara' in Google

Takayasu Sakurai

This author has not been identified. Look up 'Takayasu Sakurai' in Google