Variation-aware subthreshold logic circuit design

Hiroshi Fuketa, Ryo Takahashi, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai. Variation-aware subthreshold logic circuit design. In IEEE 10th International Conference on ASIC, ASICON 2013, Shenzhen, China, October 28-31, 2013. pages 1-4, IEEE, 2013. [doi]

Abstract

Abstract is missing.