Hiroshi Fuketa, Ryo Takahashi, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai. Variation-aware subthreshold logic circuit design. In IEEE 10th International Conference on ASIC, ASICON 2013, Shenzhen, China, October 28-31, 2013. pages 1-4, IEEE, 2013. [doi]
@inproceedings{FuketaTTNSS13-0,
title = {Variation-aware subthreshold logic circuit design},
author = {Hiroshi Fuketa and Ryo Takahashi and Makoto Takamiya and Masahiro Nomura and Hirofumi Shinohara and Takayasu Sakurai},
year = {2013},
doi = {10.1109/ASICON.2013.6811842},
url = {http://dx.doi.org/10.1109/ASICON.2013.6811842},
researchr = {https://researchr.org/publication/FuketaTTNSS13-0},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {IEEE 10th International Conference on ASIC, ASICON 2013, Shenzhen, China, October 28-31, 2013},
publisher = {IEEE},
isbn = {978-1-4673-6415-7},
}