Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint

Li Jiang, Qiang Xu, Krishnendu Chakrabarty, T. M. Mak. Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint. In 2009 International Conference on Computer-Aided Design (ICCAD 09), November 2-5, 2009, San Jose, CA, USA. pages 191-196, IEEE, 2009. [doi]

@inproceedings{JiangXCM09,
  title = {Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint},
  author = {Li Jiang and Qiang Xu and Krishnendu Chakrabarty and T. M. Mak},
  year = {2009},
  url = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5361294},
  tags = {optimization, layout, architecture, testing, constraints, design},
  researchr = {https://researchr.org/publication/JiangXCM09},
  cites = {0},
  citedby = {0},
  pages = {191-196},
  booktitle = {2009 International Conference on Computer-Aided Design (ICCAD 09), November 2-5, 2009, San Jose, CA, USA},
  publisher = {IEEE},
}