Manufacturability Analysis of Analog CMOS ICs through Examination of Multiple Layout Solutions

Pedram Khademsameni, Marek Syrzycki. Manufacturability Analysis of Analog CMOS ICs through Examination of Multiple Layout Solutions. In 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 6-8 November 2002, Vancouver, BC, Canada, Proceedings. pages 3-11, IEEE Computer Society, 2002. [doi]

Abstract

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