The following publications are possibly variants of this publication:
- Dynamic and leakage power reduction of ASICs using configurable threshold logic gatesJinghua Yang, Joseph Davis, Niranjan Kulkarni, Jae-sun Seo, Sarma B. K. Vrudhula. cicc 2015: 1-4 [doi]
- Reducing Functional Unit Power Consumption and its Variation Using Leakage SensorsAviral Shrivastava, Deepa Kannan, Sarvesh Bhardwaj, Sarma B. K. Vrudhula. tvlsi, 18(6):988-997, 2010. [doi]
- A Configurable BNN ASIC using a Network of Programmable Threshold Logic Standard CellsAnkit Wagle, Sunil Khatri, Sarma B. K. Vrudhula. iccd 2020: 433-440 [doi]