Raghavan Kumar, Vikram B. Suresh, Sachin Taneja, Mark A. Anders 0001, Steven Hsu, Amit Agarwal 0001, Vivek De, Sanu Mathew. A 7Gbps SCA-Resistant Multiplicative-Masked AES Engine in Intel 4 CMOS. In IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022. pages 138-139, IEEE, 2022. [doi]
@inproceedings{KumarST0H0DM22,
title = {A 7Gbps SCA-Resistant Multiplicative-Masked AES Engine in Intel 4 CMOS},
author = {Raghavan Kumar and Vikram B. Suresh and Sachin Taneja and Mark A. Anders 0001 and Steven Hsu and Amit Agarwal 0001 and Vivek De and Sanu Mathew},
year = {2022},
doi = {10.1109/VLSITechnologyandCir46769.2022.9830470},
url = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830470},
researchr = {https://researchr.org/publication/KumarST0H0DM22},
cites = {0},
citedby = {0},
pages = {138-139},
booktitle = {IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), Honolulu, HI, USA, June 12-17, 2022},
publisher = {IEEE},
isbn = {978-1-6654-9772-5},
}