The following publications are possibly variants of this publication:
- A 7-Gbps SCA-Resistant Multiplicative-Masked AES Engine in Intel 4 CMOSRaghavan Kumar, Vikram B. Suresh, Sachin Taneja, Mark A. Anders 0001, Steven Hsu, Amit Agarwal 0001, Vivek De, Sanu K. Mathew. jssc, 58(4):1106-1116, 2023. [doi]
- An 8.3-to-18Gbps Reconfigurable SCA-Resistant/Dual-Core/Blind-Bulk AES Engine in Intel 4 CMOSRaghavan Kumar, Vikram B. Suresh, Mark A. Anders 0001, Steven K. Hsu, Amit Agarwal 0001, Vivek K. De, Sanu K. Mathew. isscc 2022: 1-3 [doi]
- A 100Gbps Fault-Injection Attack Resistant AES-256 Engine with 99.1-to-99.99% Error Coverage in Intel 4 CMOSRaghavan Kumar, Avinash Varna, Carlos Tokunaga, Sachin Taneja, Vivek De, Sanu Mathew. isscc 2023: 244-245 [doi]
- A 100-Gbps Fault-Injection Attack-Resistant AES-256 Engine With 99.1%-99.99% Error Coverage in Intel 4 CMOSRaghavan Kumar, Avinash L. Varna, Carlos Tokunaga, Sachin Taneja, Vivek De, Sanu K. Mathew. jssc, 59(1):79-89, January 2024. [doi]
- A SCA-Resistant AES Engine in 14nm CMOS with Time/Frequency-Domain Leakage Suppression using Non-Linear Digital LDO Cascaded with Arithmetic CountermeasuresRaghavan Kumar, Xiaosen Liu, Vikram Suresh, Harish Krishnamurthy, Mark Anders, Himanshu Kaul, Krishnan Ravichandran, Vivek De, Sanu Mathew. vlsic 2020: 1-2 [doi]