The following publications are possibly variants of this publication:
- Layout-Aware Transition-Delay Fault Pattern Generation with Evenly Distributed Switching ActivityJeremy Lee, Mohammad Tehranipoor. jolpe, 4(3):360-371, 2008. [doi]
- A Novel IR-Drop Tolerant Transition Delay Fault Test Pattern Generation ProcedureNisar Ahmed, Mohammad Tehranipoor. jolpe, 6(1):150-159, 2010. [doi]
- Layout-Aware Pattern Generation for Maximizing Supply Noise Effects on Critical PathsJunxia Ma, Jeremy Lee, Mohammad Tehranipoor. vts 2009: 221-226 [doi]
- An efficient diagnosis-aware pattern generation procedure for transition faultsKuen-Jong Lee, Cheng-Hung Wu. itc 2014: 1-10 [doi]
- Layout-Aware Pattern Evaluation and Analysis for Power-Safe Application of Transition Delay Fault PatternsHassan Salmani, Wei Zhao, Mohammad Tehranipoor, Sreejit Chakravarty, Patrick Girard, Xiaoqing Wen. jolpe, 8(2):248-258, 2012. [doi]
- Test and diagnosis pattern generation for dynamic bridging faults and transition delay faultsCheng-Hung Wu, Saint James Lee, Kuen-Jong Lee. aspdac 2016: 755-760 [doi]