Researchr is a web site for finding, collecting, sharing, and reviewing scientific publications, for researchers by researchers.
Sign up for an account to create a profile with publication list, tag and review your related work, and share bibliographies with your co-authors.
Weiping Liao, Lei He. Microarchitecture Level Interconnect Modeling Considering Layout Optimization. J. Low Power Electronics, 1(3):297-308, 2005. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Performance optimization of VLSI interconnect layoutJason Cong, Lei He, Cheng-Kok Koh, Patrick H. Madden. integration, 21(1-2):1-94, 1996. [doi]
The following publications are possibly variants of this publication: