Buffering Interconnect for Multicore Processor Designs

Yifang Liu, Jiang Hu, Weiping Shi. Buffering Interconnect for Multicore Processor Designs. IEEE Trans. on CAD of Integrated Circuits and Systems, 27(12):2183-2196, 2008. [doi]

Authors

Yifang Liu

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Jiang Hu

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Weiping Shi

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