The following publications are possibly variants of this publication:
- Algorithmic and Architectural Transformations for Low Power Realization of FIR FiltersMahesh Mehendale, Sunil D. Sherlekar, G. Venkatesh. vlsid 1998: 12-17 [doi]
- Low Power Realization of FIR Filters Implemented using Distributed ArithmeticMahesh Mehendale, Amit Sinha, Sunil D. Sherlekar. aspdac 1998: 151-156
- Techniques for low power realization for FIR filtersMahesh Mehendale, Sunil D. Sherlekar, G. Venkatesh. aspdac 1995: [doi]
- Low-power realization of FIR filters on programmable DSPsMahesh Mehendale, Sunil D. Sherlekar, G. Venkatesh. tvlsi, 6(4):546-553, 1998. [doi]
- Low Power Realization of Residue Number System Based FIR FiltersM. N. Mahesh, Mahesh Mehendale. vlsid 2000: 30-33 [doi]