A DFT Selection Method for Reducing Test Application Time of System-on-Chips - researchr publication authors

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Masahide Miyazaki, Toshinori Hosokawa, Hiroshi Date, Michiaki Muraoka, Hideo Fujiwara. A DFT Selection Method for Reducing Test Application Time of System-on-Chips. In 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China. pages 412-417, IEEE Computer Society, 2003. [doi]

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