A DFT Selection Method for Reducing Test Application Time of System-on-Chips

Masahide Miyazaki, Toshinori Hosokawa, Hiroshi Date, Michiaki Muraoka, Hideo Fujiwara. A DFT Selection Method for Reducing Test Application Time of System-on-Chips. In 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China. pages 412-417, IEEE Computer Society, 2003. [doi]

@inproceedings{MiyazakiHDMF03,
  title = {A DFT Selection Method for Reducing Test Application Time of System-on-Chips},
  author = {Masahide Miyazaki and Toshinori Hosokawa and Hiroshi Date and Michiaki Muraoka and Hideo Fujiwara},
  year = {2003},
  url = {http://csdl.computer.org/comp/proceedings/ats/2003/1951/00/19510412abs.htm},
  tags = {testing},
  researchr = {https://researchr.org/publication/MiyazakiHDMF03},
  cites = {0},
  citedby = {0},
  pages = {412-417},
  booktitle = {12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-1951-2},
}