Hiok-Tiaq Ng, M.-J. Edward Lee, Ramin Farjad-Rad, Ramesh Senthinathan, William J. Dally, Anhtuyet Nguyen, Rohit Rathi, Trey Greer, John Poulton, John H. Edmondson, James Tran. A 33mW 8Gb/s CMOS clock multiplier and CDR for highly integrated I/Os. In Proceedings of the IEEE Custom Integrated Circuits Conference, CICC 2003, San Jose, CA, USA, September 21 - 24, 2003. pages 77-80, IEEE, 2003. [doi]
@inproceedings{NgLFSDNRGPET03,
title = {A 33mW 8Gb/s CMOS clock multiplier and CDR for highly integrated I/Os},
author = {Hiok-Tiaq Ng and M.-J. Edward Lee and Ramin Farjad-Rad and Ramesh Senthinathan and William J. Dally and Anhtuyet Nguyen and Rohit Rathi and Trey Greer and John Poulton and John H. Edmondson and James Tran},
year = {2003},
doi = {10.1109/CICC.2003.1249363},
url = {https://doi.org/10.1109/CICC.2003.1249363},
researchr = {https://researchr.org/publication/NgLFSDNRGPET03},
cites = {0},
citedby = {0},
pages = {77-80},
booktitle = {Proceedings of the IEEE Custom Integrated Circuits Conference, CICC 2003, San Jose, CA, USA, September 21 - 24, 2003},
publisher = {IEEE},
isbn = {0-7803-7842-3},
}