Ramin Farjad-Rad - researchr alias

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Viewing Publication 1 - 14 from 14

2020

Bunch of Wires: An Open Die-to-Die InterfaceShahab Ardalan, Halil Cirit, Ramin Farjad-Rad, Mark Kuemerle, Ken Poulton, Suresh Subramanian, Bapiraju Vinnakota. hoti 2020: 9-16 [doi]

2015

10G | 5G | 2.5G | 1G | 100M physical layer PHY: HOT CHIPS 2015 conferenceRamin Shirani, Ramin Farjad-Rad. hotchips 2015: 1-27 [doi]

2012

2007

2004

A 33-mW 8-Gb/s CMOS clock multiplier and CDR for highly integrated I/OsRamin Farjad-Rad, Anhtuyet Nguyen, James Tran, Trey Greer, John Poulton, William J. Dally, John H. Edmondson, Ramesh Senthinathan, Rohit Rathi, Ming-Ju Edward Lee, Hiok-Tiaq Ng. jssc, 39(9):1553-1561, 2004. [doi]

2003

Jitter transfer characteristics of delay-locked loops - theories and design techniquesMing-Ju Edward Lee, William J. Dally, Trey Greer, Hiok-Tiaq Ng, Ramin Farjad-Rad, John Poulton, Ramesh Senthinathan. jssc, 38(4):614-621, 2003. [doi]

CMOS High-Speed I/Os - Present and FutureM.-J. Edward Lee, William J. Dally, Ramin Farjad-Rad, Hiok-Tiaq Ng, Ramesh Senthinathan, John H. Edmondson, John Poulton. iccd 2003: 454-461 [doi]

A second-order semidigital clock recovery circuit based on injection lockingHiok-Tiaq Ng, Ramin Farjad-Rad, Ming-Ju Edward Lee, William J. Dally, Trey Greer, John Poulton, John H. Edmondson, Rohit Rathi, Ramesh Senthinathan. jssc, 38(12):2101-2110, 2003. [doi]

A 33mW 8Gb/s CMOS clock multiplier and CDR for highly integrated I/OsHiok-Tiaq Ng, M.-J. Edward Lee, Ramin Farjad-Rad, Ramesh Senthinathan, William J. Dally, Anhtuyet Nguyen, Rohit Rathi, Trey Greer, John Poulton, John H. Edmondson, James Tran. cicc 2003: 77-80 [doi]

2002

A low-power multiplying DLL for low-jitter multigigahertz clock generation in highly integrated digital chipsRamin Farjad-Rad, William J. Dally, Hiok-Tiaq Ng, Ramesh Senthinathan, M.-J. Edward Lee, Rohit Rathi, John Poulton. jssc, 37(12):1804-1812, 2002. [doi]

2000

A 0.3-/spl mu/m CMOS 8-Gb/s 4-PAM serial link transceiverRamin Farjad-Rad, Chih-Kong Ken Yang, Mark A. Horowitz, Thomas H. Lee. jssc, 35(5):757-764, 2000. [doi]

1999

A 0.4-μm CMOS 10-Gb/s 4-PAM pre-emphasis serial link transmitterRamin Farjad-Rad, Chih-Kong Ken Yang, Mark A. Horowitz, Thomas H. Lee. jssc, 34(5):580-585, 1999. [doi]

1998

A 0.5-μm CMOS 4.0-Gbit/s serial link transceiver with data recovery using oversamplingChih-Kong Ken Yang, Ramin Farjad-Rad, Mark A. Horowitz. jssc, 33(5):713-722, 1998. [doi]

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