Highly Reliable Reference Bitline Bias Designs for 64 Mb and 128 Mb Chain FeRAMs

Ryu Ogiwara, Daisaburo Takashima, Sumiko Doumae, Shinichiro Shiratake, Ryosuke Takizawa, Hidehiro Shiga. Highly Reliable Reference Bitline Bias Designs for 64 Mb and 128 Mb Chain FeRAMs. J. Solid-State Circuits, 50(5):1324-1331, 2015. [doi]

Abstract

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