Efficient Logic Verification and Test Validation for MOS LSI Circuits - researchr publication

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Kaoru Okazaki, Toshihiko Yahara. Efficient Logic Verification and Test Validation for MOS LSI Circuits. In Proceedings International Test Conference 1981, Philadelphia, PA, USA, October 1981. pages 530-535, IEEE Computer Society, 1981.

Abstract is missing.

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