Efficiency of low-power design techniques in Multi-Gate FET CMOS Circuits - researchr publication related

researchr

You are not signed in
Sign in
Sign up

Christian Pacha, Klaus von Arnim, Florian Bauer, Thomas Schulz, Wade Xiong, K. T. San, Andrew Marshall, Thomas Baumann, C. Rinn Cleavelin, Klaus Schruefer, Jörg Berthold. Efficiency of low-power design techniques in Multi-Gate FET CMOS Circuits. In Doris Schmitt-Landsiedel, Tobias Noll, editors, 33rd European Solid-State Circuits Conference, ESSCIRC 2007, Munich, Germany, 11-13 September 2007. pages 111-114, IEEE, 2007. [doi]

The following publications are possibly variants of this publication:

Circuit design issues in multi-gate FET CMOS technologiesChristian Pacha, Klaus von Arnim, Thomas Schulz, Weize Xiong, M. Gostkowski, Gerhard Knoblinger, Andrew Marshall, T. Nirschl, J. Berthold, Christian Russ, Harald Gossner, Charvaka Duvvury, Paul Patruno, C. Rinn Cleavelin, Klaus Schruefer. isscc 2006: 1656-1665 [doi]

runs on WebDSL