A 21.3-24.5Gb/s low jitter PLL-based clock and data recovery circuit with cascode-coupled quadrature LC-VCO - researchr publication authors

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Chengxian Pan, Chunqi Shi, Guoliang Zhao, Boxiao Liu, Leilei Huang, Runxi Zhang. A 21.3-24.5Gb/s low jitter PLL-based clock and data recovery circuit with cascode-coupled quadrature LC-VCO. IEICE Electronic Express, 19(24):20220432, 2022. [doi]

This author has not been identified. Look up 'Chengxian Pan' in GoogleThis author has not been identified. Look up 'Chunqi Shi' in GoogleThis author has not been identified. Look up 'Guoliang Zhao' in GoogleThis author has not been identified. Look up 'Boxiao Liu' in GoogleThis author has not been identified. Look up 'Leilei Huang' in GoogleThis author has not been identified. Look up 'Runxi Zhang' in Google

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