A 21.3-24.5Gb/s low jitter PLL-based clock and data recovery circuit with cascode-coupled quadrature LC-VCO

Chengxian Pan, Chunqi Shi, Guoliang Zhao, Boxiao Liu, Leilei Huang, Runxi Zhang. A 21.3-24.5Gb/s low jitter PLL-based clock and data recovery circuit with cascode-coupled quadrature LC-VCO. IEICE Electronic Express, 19(24):20220432, 2022. [doi]

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