Chengxian Pan, Chunqi Shi, Guoliang Zhao, Boxiao Liu, Leilei Huang, Runxi Zhang. A 21.3-24.5Gb/s low jitter PLL-based clock and data recovery circuit with cascode-coupled quadrature LC-VCO. IEICE Electronic Express, 19(24):20220432, 2022. [doi]
@article{PanSZLHZ22,
title = {A 21.3-24.5Gb/s low jitter PLL-based clock and data recovery circuit with cascode-coupled quadrature LC-VCO},
author = {Chengxian Pan and Chunqi Shi and Guoliang Zhao and Boxiao Liu and Leilei Huang and Runxi Zhang},
year = {2022},
doi = {10.1587/elex.19.20220432},
url = {https://doi.org/10.1587/elex.19.20220432},
researchr = {https://researchr.org/publication/PanSZLHZ22},
cites = {0},
citedby = {0},
journal = {IEICE Electronic Express},
volume = {19},
number = {24},
pages = {20220432},
}