A 6.7-11.2 Gb/s, 2.25 pJ/bit, Single-Loop Referenceless CDR With Multi-Phase, Oversampling PFD in 65-nm CMOS - researchr publication

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Kwanseo Park, Woo-Rham Bae, Jinhyung Lee, Jeongho Hwang, Deog Kyoon Jeong. A 6.7-11.2 Gb/s, 2.25 pJ/bit, Single-Loop Referenceless CDR With Multi-Phase, Oversampling PFD in 65-nm CMOS. J. Solid-State Circuits, 53(10):2982-2993, 2018. [doi]

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