The following publications are possibly variants of this publication:
- A Coarse-Grain Phased Logic CPURobert B. Reese, Mitchell A. Thornton, Cherrice Traver. TC, 54(7):788-799, 2005. [doi]
- A Fine-Grain Phased Logic CPURobert B. Reese, Mitchell A. Thornton, Cherrice Traver. isvlsi 2003: 70-79 [doi]
- PLFire: A Visualization Tool for Asynchronous Phased Logic DesignsKenneth Fazel, Mitchell A. Thornton, Robert B. Reese. date 2003: 11096-11097 [doi]
- Early evaluation for performance enhancement in phased logicRobert B. Reese, Mitchell A. Thornton, Cherrice Traver, David Hemmendinger. tcad, 24(4):532-550, 2005. [doi]
- Performance enhancement in phased logic circuits using automatic slack-matching buffer insertionKenneth Fazel, Lun Li, Mitchell A. Thornton, Robert B. Reese, Cherrice Traver. glvlsi 2004: 413-416 [doi]