The following publications are possibly variants of this publication:
- 17.2 A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast LockingAlessio Santiccioli, Mario Mercandelli, Luca Bertulessi, Angelo Parisi, Dmytro Cherniak, Andrea Leonardo Lacaita, Carlo Samori, Salvatore Levantino. isscc 2020: 268-270 [doi]
- A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μs-Locking-TimeSimone Mattia Dartizio, Francesco Buccoleri, Francesco Tesolin, Luca Avallone, Alessio Santiccioli, Agata Iesurum, Giovanni Steffan, Dmytro Cherniak, Luca Bertulessi, Andrea Bevilacqua, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino. jssc, 57(12):3538-3551, 2022. [doi]
- rms-Total-integrated-Jitter and 1.5µs-LocKing-Time Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency SwitchingSimone Mattia Dartizio, Francesco Buccoleri, Francesco Tesolin, Luca Avallone, Alessio Santiccioli, Agata Iesurum, Giovanni Steffan, Dmytro Cherniak, Luca Bertulessi, Andrea Bevilacqua, Carlo Samori, Andrea Leonardo Lacaita, Salvatore Levantino. isscc 2022: 1-3 [doi]
- A 2.9-to-4.0GHz fractional-N digital PLL with bang-bang phase detector and 560fsrms integrated jitter at 4.5mW powerDavide Tasca, Marco Zanuso, Giovanni Marzin, Salvatore Levantino, Carlo Samori, Andrea L. Lacaita. isscc 2011: 88-90 [doi]
- A low-phase-noise digital bang-bang PLL with fast lock over a wide lock rangeLuca Bertulessi, Luigi Grimaldi, Dmytro Cherniak, Carlo Samori, Salvatore Levantino. isscc 2018: 252-254 [doi]
- Novel Feed-Forward Technique for Digital Bang-Bang PLL to Achieve Fast Lock and Low Phase NoiseLuca Bertulessi, Dmytro Cherniak, Mario Mercandelli, Carlo Samori, Andrea L. Lacaita, Salvatore Levantino. tcasI, 69(5):1858-1870, 2022. [doi]