A read-static-noise-margin-free SRAM cell for low-VDD and high-speed applications

Koichi Takeda 0001, Yasuhiko Hagihara, Yoshiharu Aimoto, Masahiro Nomura, Yoetsu Nakazawa, Toshio Ishii, Hiroyuki Kobatake. A read-static-noise-margin-free SRAM cell for low-VDD and high-speed applications. J. Solid-State Circuits, 41(1):113-121, 2006. [doi]

Abstract

Abstract is missing.