The following publications are possibly variants of this publication:
- Balanced Multi-Level Multi-Way Partitioning of Large Analog Circuits for Hierarchical Symbolic AnalysisXiang-Dong Tan, C.-J. Richard Shi. aspdac 1999: 1-4 [doi]
- Hierarchical exact symbolic analysis of large analog integrated circuits by symbolic stampsHui Xu, Guoyong Shi, Xiaopeng Li. aspdac 2011: 19-24 [doi]
- An Efficient Multi-Way Algorithm for Balanced Partitioning of VLSI CircuitsX. Tan, J. Tong, P. Tan, Nohpill Park, Fabrizio Lombardi. iccd 1997: 608-613
- Hierarchical symbolic analysis of analog integrated circuits viadeterminant decision diagramsSheldon X.-D. Tan, C.-J. Richard Shi. tcad, 19(4):401-412, 2000. [doi]
- Multi-terminal determinant decision diagrams: a new approach to semi-symbolic analysis of analog integrated circuitsTao Pi, C.-J. Richard Shi. dac 2000: 19-22 [doi]