The following publications are possibly variants of this publication:
- Zero-skew clock tree construction by simultaneous routing, wire sizing and buffer insertionI-Min Liu, Tan-Li Chou, Adnan Aziz, D. F. Wong. ispd 2000: 33-38 [doi]
- Maze Routing with Buffer Insertion under Transition Time ConstraintsLi-Da Huang, Minghorng Lai, D. F. Wong, Youxin Gao. date 2002: 702-707 [doi]
- Maze routing with buffer insertion under transition time constraintsLi-Da Huang, Minghorng Lai, Martin D. F. Wong, Youxin Gao. tcad, 22(1):91-95, 2003. [doi]