Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

C. J. Tavares, C. Bungardean, G. M. Matos, José T. de Sousa. Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor. In Jürgen Becker, Marco Platzner, Serge Vernalde, editors, Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings. Volume 3203 of Lecture Notes in Computer Science, pages 344-353, Springer, 2004. [doi]

This author has not been identified. Look up 'C. J. Tavares' in GoogleThis author has not been identified. Look up 'C. Bungardean' in GoogleThis author has not been identified. Look up 'G. M. Matos' in GoogleThis author has not been identified. Look up 'José T. de Sousa' in Google

runs on WebDSL