C. J. Tavares, C. Bungardean, G. M. Matos, José T. de Sousa. Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor. In Jürgen Becker, Marco Platzner, Serge Vernalde, editors, Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings. Volume 3203 of Lecture Notes in Computer Science, pages 344-353, Springer, 2004. [doi]
@inproceedings{TavaresBMS04,
title = {Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor},
author = {C. J. Tavares and C. Bungardean and G. M. Matos and José T. de Sousa},
year = {2004},
url = {http://springerlink.metapress.com/openurl.asp?genre=article&issn=0302-9743&volume=3203&spage=344},
tags = {C++, context-aware},
researchr = {https://researchr.org/publication/TavaresBMS04},
cites = {0},
citedby = {0},
pages = {344-353},
booktitle = {Field Programmable Logic and Application, 14th International Conference , FPL 2004, Leuven, Belgium, August 30-September 1, 2004, Proceedings},
editor = {Jürgen Becker and Marco Platzner and Serge Vernalde},
volume = {3203},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {3-540-22989-2},
}