D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Hans-Joachim Wunderlich. Parity prediction synthesis for nano-electronic gate designs. In Ron Press, Erik H. Volkerink, editors, 2011 IEEE International Test Conference, ITC 2010, Austin, TX, USA, November 2-4, 2010. pages 820, IEEE, 2010. [doi]
Abstract is missing.