The following publications are possibly variants of this publication:
- 13.5 A 16nm 128Mb SRAM in high-κ metal-gate FinFET technology with write-assist circuitry for low-VMIN applicationsYen-Huei Chen, Wei-Min Chan, Wei-Cheng Wu, Hung-Jen Liao, Kuo-Hua Pan, Jhon-Jhy Liaw, Tang-Hsuan Chung, Quincy Li, George H. Chang, Chih-Yung Lin, Mu-Chi Chiang, Shien-Yang Wu, Sreedhar Natarajan, Jonathan Chang. isscc 2014: 238-239 [doi]
- A 16nm dual-port SRAM with partial suppressed word-line, dummy read recovery and negative bit-line circuitries for low VMIN applicationsYen-Huei Chen, Kao-Cheng Lin, Ching-Wei Wu, Wei-Min Chan, Jhon-Jhy Liaw, Hung-Jen Liao, Jonathan Chang. vlsic 2016: 1-2 [doi]
- Low VMIN 20nm embedded SRAM with multi-voltage wordline control based read and write assist techniquesMudit Bhargava, Y. K. Chong, Vincent Schuppe, Bikas Maiti, Martin Kinkade, Hsin-Yu Chen, Andy W. Chen, Sanjay Mangal, Jacek Wiatrowski, Gerald Gouya, Abhishek Baradia, Sriram Thyagarajan, Gus Yeung. vlsic 2014: 1-2 [doi]
- 12.1 A 7nm 256Mb SRAM in high-k metal-gate FinFET technology with write-assist circuitry for low-VMIN applicationsJonathan Chang, Yen-Huei Chen, Wei-Min Chan, Sahil Preet Singh, Hank Cheng, Hidehiro Fujiwara, Jih-Yu Lin, Kao-Cheng Lin, John Hung, Robin Lee, Hung-Jen Liao, Jhon-Jhy Liaw, Quincy Li, Chih-Yung Lin, Mu-Chi Chiang, Shien-Yang Wu. isscc 2017: 206-207 [doi]