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Jianjun Yu, Fa Foster Dai. On-chip Jitter Measurement Using Vernier Ring Time-to-Digital Converter. In Proceedings of the 19th IEEE Asian Test Symposium, ATS 2010, 1-4 December 2010, Shanghai, China. pages 167-170, IEEE Computer Society, 2010. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: A 3-dimensional Vernier ring time-to-digital converter in 0.13µm CMOSJianjun Yu, Fa Foster Dai. cicc 2010: 1-4 [doi] A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 μm CMOS TechnologyJianjun Yu, Fa Foster Dai, Richard C. Jaeger. jssc, 45(4):830-842, 2010. [doi]
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